The present invention relates to an electric device, such as a cellular device, having a configuration in which ICs such as drivers, memories, and controllers for driving a display panel are mounted facedown. More specifically, the present invention relates to a method of mounting an IC used in an electric device, a method of manufacturing a film substrate on which an IC is mounted, and an electronic device having a semiconductor device that is mounted by using these methods.
With conventional techniques, for example when an IC for driving a display device is mounted facedown, a plating bump or a stud bump is formed on an IC pad, and the IC is bonded to a film substrate having polyimide as a base by using an anisotropic conductive film, thus maintaining a connection. Alternatively, a silver paste is transferred to the bump and connected to a film substrate, thus filling in an under-fill therebetween and maintaining a connection.
Further, when a connection is made by using metallic diffusion, a process involving connecting a solder bump on an IC to an electrode of a film substrate to fill the under fill, and a process involving performing Sn plating on an electrode of a film substrate side and making a connection with an Au bump of the IC by using Au—Sn eutectic bonding to fill the under fill, are performed.
ICs each having a bump pitch of 45 μm and 900 electrodes have been used in recent years for ICs that drive display panels. Au—Sn eutectic connecting is typically used in order to mount at a 45 μm pitch. In order to manufacture a film substrate, a 30 Å of a seed layer made from nickel or the like is sputtered onto a polyimide film, which becomes a base material, and 2,000 Å of copper is then sputtered. The seed layer is formed in order to adhere to the copper. In addition, electrolytic plating is performed so that the total conductor thickness becomes approximately 8 μm. This type of conductor is then patterned by using a photolithography method, forming electrodes. Approximately 0.15 to 0.25 μm of pure tin is then formed on the electrodes by using non-electrolytic tin plating. In addition, solder resist is formed, thus completing the film substrate. Heat and pressure are then applied to ICs, thus completing facedown connections of the ICs onto the electrodes on the film substrate thus manufactured. In addition, the under fill is filled in and hardened in order to ensure connection reliability. There are also cases where resistors or capacitors are surface mounted. In addition, this film substrate is connected to a display panel by using an anisotropic conductive film. Elongation of the polyimide film occurs owing to heat applied when making connections, and connection terminals of the display panel and the film substrate deviate. In order to prevent this position deviation, a method in which thermal compression bonding, which had been performed in bulk, is divided up (JP 05-249479 A, for example) or a method in which the pitch of the film substrate is corrected in advance (JP 2000-312070 A, for example) has been employed.
The miniaturization of ICs progresses year by year, and mass production has begun in which 40-μm pitch ICs are mounted onto a film substrate. The examination of additionally fine pitch ICs has been progressing in order to reduce the IC surface area and decrease costs. On the other hand, when forming a straight bump, a space of 13 μm and a bump width of 15 to 17 μm are the limits at which mass production can be stably performed. Accordingly, the pad pitch of ICs that can be mass produced at present is 30 μm. However, with ICs each having more than 1,000 pins, a mounting position deviation develops with the film substrate even when using a 30-μm pitch bump arrangement. This position deviation is a phenomenon in which the cumulative pitches of the IC and the film substrate do not match, and is a phenomenon in which edge portion terminals greatly deviate when the IC and the film substrate are aligned at a center terminal. One possible cause of this phenomenon is the occurrence of the thermal deformation in the film substrate due to heat during mounting. In particular, a connection portion is heated to 350 to 380° C. with Au—Sn eutectic connecting, and deviations occur even if polyimide having high heat resistance is used. Pattern reduction may be performed at fixed scaling over an entire film substrate pattern, or over only an IC mounting portion, in order to correct elongation portions. Although the degree of deviation reduces for a pattern on which correction has been performed, elongation dispersion develops. Accordingly, this correction alone does not lead to resolving the cause.
Manufacturing the film substrate by using a rolling method is thought to be another cause. In this case, manufacturing is performed by using a 200 to 500-width raw material. Finished products are laid out and manufactured by freely arranging the finished products at 0°, 90°, 180°, and 270° on the raw material, and further, alternate finished products are arranged by rotating by 180° so that the maximum number taken out increases. The raw material of the film is uniaxially oriented polyimide, and the characteristics thereof in a flow direction (MD: Machine Direction) differ from those in a width direction (TD: Transfer Direction). According to the physical characteristics published by the film manufacturer, even though the strength, the elongation ratio, the Young's modulus, the thermal contraction ratio, the thermal expansion coefficient, and the moisture expansion coefficient have identical characteristic values in the MD and in the TD, in practice, the characteristics of dimensional change differ between the MD and the TD. Further, due to the layout of the finished products on the film substrate raw material, a connection edge of the IC may be in the MD direction or in the TD direction.
Further, dispersion in the initial dimensions of the film substrate is one large cause. There is typically a ±0.06% dispersion per unit length in the initial dimensions of a film substrate that uses a material in which a metallic thin film is sputtered onto a polyimide film, and copper electrodes are formed by electroplating. Although it is expected that a pattern mask for the film substrate has fixed conditions and is stable, with almost no dispersion, the dimensions of the finished products are not stable. The reasons for this are that dimensional change occurs at temperature with the characteristics of the polyimide film of the film substrate, and dimensional change occurs in a wet state and a dry state. For example, with Kapton 100EN of Du Pont-Toray Co., Ltd., the thermal expansion coefficient is 16 ppm/° C. in both the MD and the TD, and the moisture expansion coefficient is 15 ppm/% RH in both the MD and the TD. This influence is a cause of dimensional dispersion of the film substrate.
Dispersion in the cumulative pitch dimension of a film substrate at present is ±0.06% before mounting, even in the TD direction having good dimensional precision. A dispersion of ±0.10% develops after gold-tin eutectic connecting. In order to mount at a 30 μm pitch, with 17-mm long IC chips, the amount of permissible deviation between the bumps and the pattern of the film substrate after mounting is ±10 μm.
However, deviation dispersion due to a mounting apparatus is approximately ±5 μm, and the cumulative pitch dispersion before mounting is approximately ±10 μm with a current film substrate. A dispersion of ±17 μm thus occurs after mounting. The amount of position deviations of the IC and the film substrate after mounting has a dispersion of one half of ±17 μm, or ±8.5 μm, because the dimensional dispersion of the film after mounting is allocated to both ends with a center reference. Combining this with the dispersion of the mounting apparatus, a maximum total of ±13.5 μm results. Accordingly, many failures occur, and costs are high, when mounting 17-mm long IC chips at a 30 μm pitch.
In order to achieve 30-μm pitch mounting by using 17-mm ICs, the dimensional precision required for the film substrate is an initial cumulative pitch dispersion of ±3 μm, and a cumulative pitch dispersion after mounting of ±10 μm. A permissible value for dispersion in connecting respective electrodes can be set within ±10 μm by combining the dimensional precision of the substrate and the mounting position dispersion of the mounting apparatus. Consequently, it is necessary to make the initial dimensional dispersion of the film substrate approximately ±0.02%, which is equal to or less than half of the conventional dispersion, and it is necessary to make the precision after gold-tin eutectic mounting approximately ±0.05%.
The causes of dimensional dispersion in the film substrate are also similar when connecting to a display panel.